Filter ho: Hands-On

Hands-On Hands-On, Dt1260, Introduction, Led, Counter, Flip-Flop, Chronometer Dt1260 Introduction Led Counter Flip-Flop Chronometer

Lab 1 - LED Blinking Demo on DT1260 with Sci-Compiler

This project demonstrates two different ways to blink an LED using the DT1260 development kit and Sci-Compiler blocks. Both examples produce the same effect—an LED blinking at a set frequency—but use two distinct implementation approaches:

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Hands-On Hands-On, Dt1260, Oscilloscope, Pwm, Resource-Explorer Dt1260 Oscilloscope Pwm Resource-Explorer

Lab 2 - Using the Onboard Oscilloscope in Sci-Compiler

This tutorial explains how to set up and operate the Oscilloscope block in Sci-Compiler on the DT1260 (or similar supported hardware).

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Hands-On Hands-On, Dt1260, Oscilloscope, Discriminator, Comparator, Counter, Register, Pwm Dt1260 Oscilloscope Discriminator Comparator Counter Register Pwm

Lab 3 - Threshold Discriminator with Event Counter

This project demonstrates how to: Create and use custom registers in Sci-Compiler (e.g., THRESHOLD, RESET, COUNTS) Compare an analog input signal against a programmable threshold Count threshold‐crossing events View both analog and digital signals on the integrated Oscilloscope In addition, we use a Pulse Generator as a test signal source, feeding the DT1260 input connector through a 5× attenuator.

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Hands-On Hands-On, Dt1260, Sci-Sdk, Discriminator, Comparator, Counter, Register, Python Dt1260 Sci-Sdk Discriminator Comparator Counter Register Python

Lab 4 - Using SciSDK in Python to Access the Threshold Discriminator Registers

In the Threshold Discriminator with Event Counter Lab (Lab 3), we designed an FPGA firmware on the DT1260 that implements:

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Hands-On Hands-On, Dt1260, Sci-Sdk, PyQt, Waveform, Oscilloscope, Python Dt1260 Sci-Sdk PyQt Waveform Oscilloscope Python

Lab 5 - Acquiring and Plotting Waveforms with SciSDK and PyQtGraph

In Threshold Discriminator with Event Counter Lab (Lab 3), you created an FPGA design that includes an Oscilloscope block (plus your threshold comparator, event counter, and so on).

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Hands-On Hands-On, Dt1260, Sci-Sdk, Register, Threshold-Scan, Python Dt1260 Sci-Sdk Register Threshold-Scan Python

Lab 6 - Threshold Scan with SciSDK on the DT1260

In Threshold Discriminator with Event Counter Lab (Lab 3), we developed a firmware on the DT1260 that includes: A threshold register (THRESHOLD) for an analog comparator.

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Hands-On Hands-On, Dt1260, Sci-Sdk, Register, Dwell-Time, Timer, Python Dt1260 Sci-Sdk Register Dwell-Time Timer Python

Lab 7 - FPGA-Based Dwell Time for Precise Event Counting

In previous labs, the dwell time (the interval during which we count threshold crossings) was controlled by the PC simply by waiting a certain number of seconds in Python.

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Hands-On Hands-On, Dt1260, ToF, ToT, Trigger, Chronometer, Histogram, ToF-Spectrum, Digital-Io Dt1260 ToF ToT Trigger Chronometer Histogram ToF-Spectrum Digital-Io

Lab 8 - Measuring Time‐of‐Flight (ToF) and Time‐over‐Threshold (ToT)

In this lab, we extend our FPGA design to measure: ToF (Time of Flight): The time difference between an external reference signal (T0) and the main signal on the analog input.

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Hands-On Hands-On, Dt1260, Sci-Sdk, Python, ToF, ToT, Histogram, ToF-Spectrum Dt1260 Sci-Sdk Python ToF ToT Histogram ToF-Spectrum

Lab 9 - Reading and Plotting Two Spectra (ToT and ToF)

In Measuring Time‐of‐Flight (ToF) and Time‐over‐Threshold (ToT) (Lab 8), we added firmware blocks to measure Time-over-Threshold (ToT) and Time-of-Flight (ToF). Below is a Python script (lab9_read_spectra.

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Hands-On Hands-On, List, Timestamp, Trigger, Packet Dt1260 List Timestamp Trigger Packet

Lab 10 - Timestamp and Time‐over‐Threshold with List Data Buffer

This example measures both Time over Threshold (ToT) for an analog signal and a Timestamp associated with each event. The design then stores (or “lists”) these measurements in a memory buffer for later readout.

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Hands-On Hands-On, Sci-Sdk, List, Timestamp, Trigger, Packet, ToT, ToF Dt1260 Sci-Sdk List Timestamp Trigger Packet ToT ToF

Lab 11 - Python Readout, Decoding, and Plotting of ToF and ToT

In this lab, we build on Timestamp and Time‐over‐Threshold with List Data Buffer (Lab 10), where data from each event contains both ToT (Time‐over‐Threshold) and ToF (Time‐of‐Flight) values.

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Hands-On Hands-On, Trigger, Oscilloscope Dt1260 Trigger Oscilloscope

Lab 12 - Leading Edge with Hysteresis, Derivative, and Trapezoidal Trigger Comparison

In modern signal processing for nuclear or high‐speed detectors, triggers are crucial for identifying when a relevant event occurs in an analog signal.

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Hands-On Hands-On, Peak Sense, Trigger, Oscilloscope, Spectrum, Histogram Dt1260 Peak Sense Trigger Oscilloscope Spectrum Histogram

Lab 13 - Measuring Signal Amplitude via Peak Detection

This document describes how to measure the maximum amplitude (peak) of an incoming analog signal using Sci‐Compiler blocks. The system uses a Trigger block (with hysteresis) to detect and reset a Peak Detector, which then measures the highest value of the signal while a Timer defines the capture window.

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Hands-On Hands-On, Charge-Integration, QDC, Baseline, Trigger, Oscilloscope, Spectrum, Histogram Dt1260 Charge-Integration QDC Baseline Trigger Oscilloscope Spectrum Histogram

Lab 14 - Charge Integration

This lab illustrates how to integrate the charge (area) of an input signal using two main building blocks in Sci-Compiler:

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Hands-On Hands-On, Trapezoidal-Filter, Shaper, Baseline, Trigger, Oscilloscope, Spectrum, Histogram Dt1260 Trapezoidal-Filter Shaper Baseline Trigger Oscilloscope Spectrum Histogram

Lab 15 -Trapezoidal Filtering with a Fully Integrated MCA IP Core

This lab demonstrates how to acquire and process signals using an all‐in‐one MCA (Multi‐Channel Analyzer) IP core featuring trapezoidal filters for both fast triggering and slow energy measurement.

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Hands-On Hands-On, CR–RC, Shaper Dt1260 CR–RC Shaper

Lab 16 - CR–RC² Shaping Amplifier

In this lab, we implement a CR–RC² shaping amplifier in Sci‐Compiler. The CR (high‐pass) stage and RC² (two consecutive low‐pass filters) stage together create a classic pulse‐shaping network frequently used in nuclear pulse spectroscopy and other signal processing applications where pulses must be transformed into a well‐defined shape.

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Hands-On Hands-On, Psd, Neutron-Gamma, 2D-Histrogram Dt1260 Psd Neutron-Gamma 2D-Histrogram

Lab 17 - Implementing a Pulse Shape Discriminator (PSD) Based on Amplitude vs. Area Ratio

In this lab, we demonstrate how to discriminate pulses by computing the ratio of a pulse’s peak amplitude to its integrated area.

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Hands-On Hands-On, Psd, Neutron-Gamma, 2D-Histrogram Dt1260 Psd Neutron-Gamma 2D-Histrogram

Lab 18 - Implementing a Pulse Shape Discriminator (PSD) Based on Ratio between areas

Below is a document describing a Pulse Shape Discrimination (PSD) technique based on two integrated areas (QSHORT and QLONG) rather than the peak‐to‐area approach.

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Hands-On Hands-On, Dt1260, Readout, Arbiter, List Dt1260 Readout Arbiter List

Lab 19 - Multichannel Readout Using the Round Robin Arbiter

In this lab, we demonstrate how to acquire and read out data from multiple input channels in a Round Robin fashion using a FIFO-based arbiter.

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Hands-On Hands-On, Dt1260, Multichannel, Sub-Design, Readout, Arbiter, List Dt1260 Multichannel Readout Sub-Design Arbiter List

Lab 20 - Multichannel Design using Sub-Designs

In this lab, we extend the Lab 19 single-channel readout design into a multichannel setup by creating a sub-design that can be instantiated multiple times in the top-level schematic.

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Hands-On Hands-On, Dt1260, Multichannel, Sub-Design, Readout, Arbiter, List Dt1260 Multichannel Readout Sub-Design Arbiter List

Lab 21 - Sub-Block Instances

In Lab 20, we created a single sub-design (core_block) and used the Multichannel Sub Design feature to automatically replicate that block for multiple channels (i.

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Hands-On Hands-On, Dt1260, Multichannel, Sub-Design, Readout, Arbiter, List Dt1260 Multichannel Readout Sub-Design Arbiter List

Lab 22 - Memory-Mapped Components in a Sub-Design

In this lab, we start from Lab 20 (the single-channel design) and create a sub-design that implements the logic for a single channel.

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Hands-On Hands-On, Dt1260, Waveform, Readout, Digitizer Dt1260 Waveform Readout Digitizer

Lab 23 - Waveform digitizer

In this lab, we explore how to capture waveforms using the Digitizer component in SciCompiler, adding the hits (64-bit) and timestamp (64-bit) fields so we can store additional information about each acquired waveform.

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Hands-On Hands-On, Dt1260, Pid, Control-Loop Dt1260 Pid Control-Loop

Lab 24 - PID Controller

This lab explains the theory and implementation of a Proportional-Integral (PI) controller in FPGA, specifically for realizing an Automatic Gain Control (AGC) system.

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Hands-On Hands-On, Simulation, Gate Delay, Trigger, Monostable, Logic Simulation Gate Delay Trigger Monostable Logic

Sim 1 - Introduction to Simulation

Simulating an FPGA design before hardware implementation is crucial. It allows us to: Verify functionality and logic without risking real hardware.

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Hands-On Hands-On, Simulation, Scripting, Trigger, Counter Simulation Scripting Trigger Counter

Sim 2 - Scripting Simulation

In this lab, we demonstrate how to automate simulations in Sci‐Compiler using register scripting . We focus on a Trigger LE Hyst block whose threshold is driven by a programmable register.

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Hands-On Hands-On, Simulation, Trapezoidal-Filter, Mca Simulation Trapezoidal-Filter Mca

Sim 3 - Design of a Recursive Trapezoidal Filter

Introduction (Theoretical Background) Digital pulse shaping has become a cornerstone technique in modern nuclear spectroscopy, offering high flexibility and performance compared to its analog counterparts.

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Hands-On Hands-On, Simulation, Baseline, Mca Simulation Baseline Mca

Sim 4 - Design of a Baseline Restorer

In this lab, we implement and simulate a Baseline Restorer (BLR) module that locks on to the baseline of an incoming signal while inhibiting baseline updates whenever a pulse is detected.

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Hands-On Hands-On, Simulation, Psd Simulation Psd

Sim 5 - Implementing a Pulse Shape Discriminator (PSD) Based on Amplitude vs. Area Ratio

In this lab, we demonstrate how to discriminate pulses by computing the ratio of a pulse’s peak amplitude to its integrated area.

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Hands-On Hands-On, Simulation, Psd, Position-Sense Simulation Psa Position-Sense

Sim 6 - Simulating PSA block for position sense He3 tube

1. Core Idea of Position Sensing For a neutron-sensitive tube read out at both ends (Side A and Side B), the principle is:

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Hands-On Hands-On, Simulation, State-Machine Simulation State-Machine

Sim 7 - Simulating a Simple State Machine for Gamma Ray Burst Detection

In this lab, we simulate a simple application where a gamma-ray detector must recognize a high-rate (“burst”) event. We measure the event rate in a defined time window (e.

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