Lab 1 - LED Blinking Demo on DT1260 with Sci-Compiler

This project demonstrates two different ways to blink an LED using the DT1260 development kit and Sci-Compiler blocks. Both examples produce the same effect—an LED blinking at a set frequency—but use two distinct implementation approaches:

  1. A low-level counter approach
  2. An integrated Pulse Generator (PWM) block

Below you can see schematic captures for each design (the images in this repository).

1. Low-Level Counter Approach

Led blinking schematic
Led blinking schematic

In this implementation, we manually create the blinking behavior by:

  1. Counting Clock Cycles

    • We use the Chrono (Enable) block to count clock pulses (at 65 MHz) whenever the ENABLE input is high.
    • The current count is output on the TIME pin of the Chrono block.

  2. Comparing to Thresholds

    • Two Comparator (GREATER) blocks check if the TIME count exceeds two different thresholds:
      • For example:
        • Threshold 1 = 10,000,000
        • Threshold 2 = 15,000,000
    • Both thresholds are fed from Const Bit-Vector blocks of size 32 bits.

Configuration of the comparator
Configuration of the comparator

  1. Set/Reset Flip-Flop

    • The outputs from the two comparators drive a FF SET-RESET block.
    • When the count passes the first threshold, the flip-flop is set.
    • When the count passes the second threshold, the flip-flop is reset and (if configured) the Chrono can be reset or continue counting based on the logic we design.

  2. LED Outputs

    • The flip-flop’s output is sent to LED_0.
    • An inverter (Logic Not) drives LED_1 from the same flip-flop signal, so you can see two complementary blinking signals if desired.

This design conceptually works like this:

  • The Chrono block counts rising edges of the 65 MHz clock.
  • After a certain count (e.g., 10,000,000 cycles), we set the flip-flop.
  • After a higher count (e.g., 15,000,000 cycles), we reset the flip-flop.
  • The block can then reset or continue (depending on how we wire it), so that the cycle repeats.

Result: The flip-flop output toggles in a timed manner, blinking the LED at a predictable rate based on the clock frequency and the comparison thresholds.

Chrono (Enable) Block Basics

  • Enable: When high, it starts counting.
  • Time (32 bits): Outputs the current count.
  • Overflow: Goes high if the count exceeds the maximum 32-bit range.
  • Auto Reset: Automatically resets the counter on overflow when high.
  • Reset: When high, it zeroes the counter and restarts the count.

(See the included documentation excerpt for a full explanation.)

2. Integrated Pulse Generator (PWM) Approach

Alternative solution using integrated PWM IP
Alternative solution using integrated PWM IP

For a simpler design, we can generate the blinking (or a PWM-like signal) directly using the Pulse Generator (PWM) block:

  1. PULSE_PERIOD & PULSE_WIDTH

    • Two Const Bit-Vector inputs define the period and width in clock cycles.
    • For example:
      • Period = 15,000,000 clock cycles
      • Width = 5,000,000 clock cycles
    • At 65 MHz, 15,000,000 cycles corresponds roughly to a 0.23 second period.

  2. CLK & RESET

    • The PWM block’s CLK runs at 65 MHz (like the DT1260 default).
    • The RESET can be driven by a global reset or other logic.

  3. Output

    • The PWM output pin (PULSE) drives the LED_1.
    • Whenever PULSE_WIDTH has elapsed, the signal transitions from high to low (or vice versa), creating a blinking effect.

Result: A blinking signal is generated directly without needing explicit counters or comparators. By changing the PULSE_PERIOD and PULSE_WIDTH, you can easily adjust blink frequency and duty cycle.

Notes on Clock Settings

  • Both designs rely on the 65 MHz clock on the DT1260.
  • For each approach, the LED blink rate is directly tied to the chosen clock cycle thresholds.

How to Use This Project

  1. Open the Sci-Compiler project files in your workspace.
  2. Build (synthesize) the design for the DT1260 development kit.
  3. Load the bitstream onto the board.
  4. Observe that:
    • In the counter-based design, LED_0 and LED_1 toggle at the configured thresholds.
    • In the PWM-based design, the output LED_1 is driven by the Pulse Generator block’s duty cycle.

You can modify the constants (10,000,000, 15,000,000, or 5,000,000 in the examples) to change how fast the LED toggles.

Further Reading

  • Chrono (Enable) Documentation: Explains count, overflow, and reset functionality.
  • Comparator (GREATER) Documentation: Details how numeric comparisons are performed.
  • Pulse Generator (PWM) Documentation: Shows how to generate periodic or PWM-like signals.

These blocks are part of the Sci-Compiler library from Nuclear Instruments SRL.

Enjoy experimenting! If you have questions, refer to the component guides or your local lab instructions.

Repository

You will find the full project in the GitHub repository.