Lab 14 - Charge Integration

This lab illustrates how to integrate the charge (area) of an input signal using two main building blocks in Sci-Compiler:

1. A Baseline Restorer to keep the baseline level stable.
2. A Charge Integrator (QDC) that measures the area of the signal above the baseline within a specified integration window.

You can use these blocks with pulse‐type signals from detectors, where total charge often correlates to the deposited energy.

Digital Charge Integration for a Detector

In a typical radiation or particle detector, a short pulse is generated in response to an incident particle or photon. The pulse’s integral (area under the curve) is proportional to the charge collected, and by extension, the energy deposited in the detector. Mathematically, if \( s(t) \) is the detector output (after baseline subtraction), the total charge \( Q \) can be expressed as an integral over the integration window \( [t_0, t_1] \):

\[ Q = \int_{t_0}^{t_1} \bigl(s(t)\bigr) \, dt \]

In a digitized (sampled) system, where \( s[n] \) represents the \( n \)-th sample and \( T \) is the sampling period, the discrete approximation becomes:

\[ Q \approx \sum_{n = 0}^{N-1} s[n] \cdot T \]

Here:

• \( s[n] \) is the baseline-corrected sample value.
• \( N \) is the total number of samples in the integration window.
• \( T \) is the sampling period (i.e., \( 1 / f_{\text{sampling}} \)).

Within the FPGA, the Baseline Restorer estimates and subtracts the pedestal or offset in real time, ensuring \( s[n] \) accurately represents the true pulse height above baseline. The QDC then sums these baseline-corrected samples over a configurable time window, producing a digital count proportional to the pulse’s total charge.

Because charge is directly tied to many physical processes in detectors (e.g., energy deposition), the QDC output can often be interpreted as an energy measurement. By adjusting parameters like the integration window size or delay, you can tailor the system to different detector characteristics and pulse shapes.

1. Block Diagram

Below is the schematic in Sci‐Compiler:

Key Components:

• Analog In Pin: The ADC source carrying the raw signal.
• Trigger LE Hyst: Detects signal above a certain threshold to indicate that a pulse has arrived.
• Baseline Restorer: Dynamically calculates and subtracts the baseline level from the signal.
• Charge Integrator (QDC): Performs the actual integration within a user‐defined time window.
• Oscilloscope: Monitors both the input signal and the integrated output.
• Spectrum: Bins integrated values (energy) into a histogram.

2. Baseline Restorer

The Baseline Restorer block calculates an average baseline level of the input signal. By removing DC offset or slow drift, it ensures the Charge Integrator receives a properly zero‐referenced signal.

Baseline Restorer Signals

Notes:

• LENGTH is set in powers of two, with typical values 5–11 (i.e., averaging over 32 to 2048 samples, using power of 2 low.). Effective length is 2^LENGTH samples.
• HOLD is generally the time you want to wait after the trigger, to ensure the block is not updating during the pulse itself.
• Once the baseline is calculated, it is available on the BASELINE output to be subtracted from subsequent pulses.

3. Charge Integrator (QDC)

The Charge Integrator (QDC) block sums the (baseline‐corrected) input signal samples over a specified time window. This approach measures the total charge, which is proportional to the area under the pulse.

QDC Signals

Under the hood, the QDC uses a 32‐bit accumulator. The final 16‐bit Energy output is Accumulator × (Gain / 65536). The user does not directly access the 32‐bit accumulator; it is handled internally.

4. Configuration Registers

The QDC and Baseline Restorer parameters are typically set via registers:

Common user‐defined parameters:

• THRESHOLD: Trigger threshold in ADC counts.
• Int Time (INT_SAMPLES): Number of samples to accumulate.
• Pre Int (PRE_TRIGGER): Samples to include before the trigger event.
• Pileup Inib: Duration that discards subsequent triggers.
• Gain: Digital gain factor.
• M_LENGTH & BL_HOLD: Control baseline averaging size and hold time.

5. Signal Waveforms

Input Pulse (Oscilloscope)

An example of the incoming pulse on Channel 1 (Blue). The signal baseline is around 2400–2500 ADC counts. The Trigger block fires once the pulse exceeds THRESHOLD (2350 in this example).

Integration in Progress

• Channel 1 (Blue): May show the baseline‐subtracted signal or the raw input.
• Channel 2 (Green): The integrator output ramping up. Once integration completes, the final Energy is latched.

6. Energy Spectrum

As the QDC finishes integrating each pulse, the Energy value is sent to a Spectrum block:

• X‐Axis (Channels): Energy bins (0 to 4095 or 65535).
• Y‐Axis (Counts): Frequency of pulses in each energy channel.

Multiple peaks can appear if there are different energy components in the signal source. Over time, this histogram reveals the distribution of integrated pulse areas.

7. Conclusion

In Lab 14: Charge Integration, we:

1. Restore Baseline with a configurable averaging method.
2. Trigger on pulses exceeding a threshold.
3. Accumulate the signal area during a set window (Pre Int + Int Time).
4. Reject Pileup with a user‐defined inhibition window to avoid overlapping pulses.
5. Capture final integrated area as a 16‐bit value for easy histogramming.
6. Analyze integrated energies in a spectrum to identify distinct peaks or energy distributions.

By properly choosing parameters such as Int Time, Pre Int, Pileup Inib, Gain, and baseline settings, you can optimize charge integration for various detector signals—commonly found in radiation detection, particle physics, and other domains where total energy measurement is essential.