Tag: Videotutorial

Sci-Compiler Quick Start First Project Design

Convert a flat design into a multichannel design

In the new version of Sci-Compiler (>2024.3.x) is no more mandatory to place all the readout and configuration elements in the top page of the design.

How to make documentation in Sci-Compiler

Discover the latest feature of SciCompiler! Now, you can create integrated project documentation with ease. Our built-in editor, similar to Microsoft Word, makes writing documentation a breeze.

IIR Filters to emulate a CR-RC shapers

Sci-Compiler 2024.3.x introduces IIR filters to emulate any complex analog filter. Implementing an IIR (Infinite Impulse Response) filter to emulate analog filters, specifically CR-RC (Capacitor-Resistor) semi-Gaussian shapers, in an FPGA (Field-Programmable Gate Array) involves a blend of digital signal processing techniques and an understanding of the analog filter characteristics you wish to emulate.

How to build a leading edge discriminator

Sci-Compiler allows to easy implement FIFO communication to transfer formatted data , like listo of energy, timecode, channels from FPGA to user computer in form of structured packet.

How to build an analog waveform recorder

Sci-Compiler allows to easy implement FIFO communication to transfer formatted data , like listo of energy, timecode, channels from FPGA to user computer in form of structured packet.

How to build a Leading Edge trigger

This application note will show how to support a scientific application with an FPGA firmware, consisting of a signal discriminator with an arbitrary but fixed hardcoded threshold, designed and compiled with Sci-Compiler programming language and run on the SciDK development board.

How to build a DAQ in Python

The digitizer block in Sci-Compiler works as a programmable size FIFO to store waveform. It is possible to define, compiling time, the maximum number of channels, while at runtime it is possible to select which channels effectively dump.