The Resource Explorer offers the possibility to visualize in the time domain and analyze simultaneously multiple digital signals thanks to the Graphic Display of the Logic Analyzer. By clicking on each element of the Logic Analyzer list a menu allows to “Add to Graphic Display” the selected Logic Analyzer block used in the diagram. The following window, with the name of the Logic Analyzer defined by the user and of its address expressed in hexadecimal notation, is shown. All the input signals of the selected Logic Analyzer are displayed in different rows, labeled with the signal names define by the user. For the digital 1 bit signals (BUS_2 and BUS_3) the high value corresponds to a logic one, while the low value is a logic zero. For the digital signals with more bits (BUS_0 and BUS_1) the various states are represented with blocks of different length indicating their time duration. The value of the signal for a certain amount of time is specified by the number written in each block (BUS_0). The “x” denotes a transition in the digital signal value. If the duration of a signal is too low the number will not be displayed (BUS_1). In order to visualize faster transitions it is possible to zoom the graph by using the mouse wheel.

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inline image The button allows to start the input signal acquisition.

inline image The button allows to stop the input signal acquisition.

The “refresh” menu gives the possibility to manually or automatically refresh the graph. The “Trigger Mode” menu is used to indicate if the trigger for the signal acquisition is provided by the trigger input of the correspondent Logic Analyzer block (“Signal” option) or is the internal one (“Software” option). The upper bar can be used to move in the time acquisition, while on the bottom is shown the correspondent time value on the x axis. The “STATUS” label indicates if the Logic Analyzer is idle, is waiting for trigger or if it has done the signal acquisition.